Abstract

The vast amount of data generated by camera sensors has prompted the exploration of energy-efficient processing solutions for deploying computer vision tasks on edge devices. Among the various approaches studied, processing-in-pixel integrates massively parallel analog computational capabilities at the extreme-edge, ie, within the pixel array and exhibits enhanced energy and bandwidth efficiency by generating the output activations of the first neural network layer rather than the raw sensory data. In this article, we propose an energy and bandwidth efficient ADC-less processing-in-pixel architecture. This architecture implements an optimized binary activation neural network trained using Hoyer regularizer for high accuracy on complex vision tasks. In addition, we also introduce a global shutter burst memory read scheme utilizing fast and disturb-free read operation leveraging innovative use of nanoscale …

Metadata

publication

arXiv e-prints, arXiv: 2410.10592, 2024

year

2024

publication date

2024/10

authors

Md Abdullah-Al Kaiser, Gourav Datta, Jordan Athas, Christian Duffee, Ajey P Jacob, Pedram Khalili Amiri, Peter A Beerel, Akhilesh R Jaiswal

link

https://ui.adsabs.harvard.edu/abs/2024arXiv241010592A/abstract

journal

arXiv e-prints

pages

arXiv: 2410.10592