Abstract

Sequential logic locking has been studied over the last decade as a method to protect sequential circuits from reverse engineering. However, most of the existing sequential logic locking techniques are threatened by increasingly more sophisticated SAT-based attacks, efficiently using input queries to a SAT solver to rule out incorrect keys, as well as removal attacks based on structural analysis. In this paper, we propose TriLock, a sequential logic locking method that simultaneously addresses these vulnerabilities. TriLock can achieve high, tunable functional corruptibility while still guaranteeing exponential queries to the SAT solver in a SAT-based attack. Further, it adopts a state re-encoding method to obscure the boundary between the original state registers and those inserted by the locking method, thus making it more difficult to detect and remove the locking-related components.

Metadata

publication

2022 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2022

year

2022

publication date

2022/3/14

authors

Yuke Zhang, Yinghua Hu, Pierluigi Nuzzo, Peter A Beerel

link

https://ieeexplore.ieee.org/abstract/document/9774649/

resource_link

https://arxiv.org/pdf/2201.05943

conference

2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)

pages

1329-1334

publisher

IEEE