Abstract

A driver circuit includes digital inputs, such as a first digital input and a second digital input. The digital inputs receive voltages at either a digital high-voltage or a digital low voltage. The driver circuit has a clock input, an analog output, a first differential pair of transistors connected to the analog output, second differential pairs of transistors con nected to the analog output, and voltage limiters connected to the clock input and the second differential pairs of transistors. The voltage limiters supply different voltages to the second differential pairs of transistors, which results in the second differential pairs of transistors providing analog signals to the analog output that are at different voltage steps at, and between, the digital high-voltage and the digital low-voltage.

Metadata

publication

US Patent 11,239,633, 2022

year

2022

publication date

2022/2/1

authors

AP Jacob, SM Serunjogi, MAT Sanduleanu

link

https://patents.google.com/patent/US11239633B2/en

resource_link

https://patentimages.storage.googleapis.com/a4/e3/8a/6987ff4e66c448/US11239633.pdf

inventors

Ajey Poovannummoottil Jacob, Solomon M Serunjogi, Mihai Adrian Tiberiu Sanduleanu

patent_office

US

patent_number

11239633

application_number

16794330