Abstract

Disclosed is a cell that integrates a pixel and a three-terminal non-volatile memory device. The cell can be selectively operated in write, read and functional computing modes. In the write mode, a first data value is stored in the memory device. In the read mode, it is read from the memory device. In the functional computing mode, the pixel captures a second data value and a sensed change in an electrical parameter (eg, voltage or current) on a bitline connected to the cell is a function of both the first and second data value.
Also disclosed is an IC structure that includes an array of the cells and, when multiple cells in a given column are con currently operated in the functional computing mode, the sensed total change in the electrical parameter on the bitline for the column is indicative of a result of a dot product computation.

Date

July 20, 2021

Authors

A Jaiswal, AP Jacob

Inventors

Akhilesh Jaiswal, Ajey Poovannummoottil Jacob

Patent_office

US

Patent_number

11069402

Application_number

16820801