Publications
Apparatus and method for in-memory binary convolution for accelerating deep binary neural networks based on a non-volatile memory structure
Abstract
The present disclosure relates to a structure including a differential memory array circuit which is configured to perform a binary convolution of two input word operands by accumulating a summation of currents through a plurality of bits which are each arranged between a wordline and a sourceline in a horizontal direction and bitlines in a vertical direction.
Metadata
- publication
- US Patent 10,997,498, 2021
- year
- 2021
- publication date
- 2021/5/4
- authors
- A Agrawal, AP Jacob
- link
- https://patents.google.com/patent/US10997498B2/en
- resource_link
- https://patentimages.storage.googleapis.com/89/1b/10/b034897f333c90/US10997498.pdf
- inventors
- Amogh Agrawal, Ajey Poovannummoottil Jacob
- patent_office
- US
- patent_number
- 10997498
- application_number
- 16366187