Abstract

Integrated circuits and methods for fabricating integrated circuits are provided herein. The integrated circuit includes a first MTJ stack overlying a semiconductor substrate. The integrated circuit further includes a second lower MTJ stack spaced from the first lower MTJ stack and overlying the semiconductor substrate. The integrated circuit further includes a dielectric layer disposed between the first lower MTJ stack and the second lower MTJ stack. The dielectric layer is overlying the semiconductor substrate. The inte grated circuit further includes a spin orbit torque coupling layer overlying the first lower MTJ stack, the dielectric layer, and the second lower MTJ stack. The integrated circuit further includes a first upper MTJ stack overlying the spin orbit torque coupling layer and the first lower MTJ stack. The integrated circuit further includes a second upper

Date

September 10, 2019

Authors

AP Jacob, J Akhilesh

Inventors

Ajey Poovannummoottil Jacob, Jaiswal Akhilesh

Patent_office

US

Patent_number

10411069

Application_number

15898547