Abstract

ABSTRACT A FinFET device includes a fin formed in a semiconductor substrate, a gate structure positioned above a portion of the fin, and source and drain regions positioned on opposite sides of the gate structure, wherein the semiconductor sub strate includes a first semiconductor material. A silicon carbide (SiC) semiconductor material is positioned above the fin in the source region and the drain region, wherein the silicon-carbide (SiC) semiconductor material is different from the first semiconductor material. A graphene contact is positioned on and in direct physical contact with the silicon carbide (SiC) semiconductor material in each of the source region and the drain region, and first and second contact structures are conductively coupled to the graphene contacts in the source region and the drain region, respectively. 20 Claims, 23 Drawing Sheets

Metadata

publication

US Patent 10,325,812, 2019

year

2019

publication date

2019/6/18

authors

AP Jacob

link

https://patents.google.com/patent/US10325812B2/en

resource_link

https://patentimages.storage.googleapis.com/87/64/12/96e268694c96dd/US10325812.pdf

inventors

Ajey Poovannummoottil Jacob

patent_office

US

patent_number

10325812

application_number

15950291