Abstract

Methods and semiconductor structures formed from the methods are provided which facilitate fabricating semicon ductor fin structures. The methods include, for example: pro viding a wafer with at least one semiconductor fin extending above a Substrate; transforming a portion of the semiconduc tor fin (s) into an isolation layer, the isolation layer separating a semiconductor layer of the semiconductor fins) from the Substrate; and proceeding with forming a fin device (s) of a first architectural type in a first fin region of the semiconduc tor finCs), and a fin device (s) of a second architectural type in a second fin region of the semiconductor finCs), where the first architectural type and the second architectural type are dif ferent fin device architectures.

Metadata

publication

US Patent 9,349,730, 2016

year

2016

publication date

2016/5/24

authors

AP Jacob, K Cheng, BB Doris, N Loubet, P Khare, R Divakaruni

link

https://patents.google.com/patent/US9349730B2/en

resource_link

https://patentimages.storage.googleapis.com/4d/2c/d9/128229203827d9/US9349730.pdf

inventors

Ajey Poovannummoottil Jacob, Kangguo Cheng, Bruce B Doris, Nicolas Loubet, Prasanna Khare, Ramachandra Divakaruni

patent_office

US

patent_number

9349730

application_number

13945415