Abstract

0007. In general, aspects of the present invention relate to an approach for using a dopant to provide increased device isolation by the use of in situ doping prior to SiGe cladding depositional application.
0008 A first aspect of the present invention provides a method for forming an integrated circuit using the steps of first forming a set offins on a silicon Substrate in a predeter mined pattern, doping the set of fins in situ with an N-type dopant, and Subsequently growing an epitaxial cladding layer over the doped fins to form a multigate semiconductor device. 0009. A second aspect of the present invention provides a method for forming an integrated circuit using the steps of first forming a set offins on a silicon Substrate in a predeter mined pattern, doping the fins in situ with an N-type dopant,

Metadata

publication

US Patent App. 13/921,265, 2014

year

2014

publication date

2014/12/25

authors

AP Jacob, MK Akarvardar, BB Doris, A Khakifirooz

link

https://patents.google.com/patent/US20140374807A1/en

resource_link

https://patentimages.storage.googleapis.com/09/51/e6/e025e7ad33ce16/US20140374807A1.pdf

inventors

Ajey Poovannummoottil Jacob, Murat Kerem Akarvardar, Bruce B Doris, Ali Khakifirooz

patent_office

US

application_number

13921265