Abstract

The growing data generated by camera sensors has driven the need for energy-efficient solutions to deploy computer vision tasks on edge devices. Processing-in-pixel, which integrates parallel computation within the pixel array, improves energy and bandwidth efficiency by generating output activations of the first neural network layer rather than raw sensor data. This paper proposes an ADC-less processing-in-pixel architecture that implements a binary activation neural network optimized with a Hoyer regularizer for high accuracy in complex vision tasks. Additionally, a global shutter burst memory read scheme is introduced, enabling fast, disturbance-free read operations with nanoscale voltage-controlled magnetic tunnel junctions (VC-MTJs). The proposed algorithmic framework incorporates device and circuit constraints based on fabricated VC-MTJ characteristics and simulations using GlobalFoundries’ 22nm …

Date

June 18, 2025

Authors

Md Abdullah-Al Kaiser, Gourav Datta, Jordan Athas, Christian Duffee, Ajey P Jacob, Pedram Khalili Amiri, Peter A Beerel, Akhilesh R Jaiswal

Journal

npj Unconventional Computing

Volume

2

Issue

1

Pages

1-15

Publisher

Nature Publishing Group